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Model Technology Inc.


Using the TextIO package

To access the routines in TextIO, include the following statement in your VHDL source code:

USE std.textio.all; 

A simple example using the package TextIO is:

USE std.textio.all;
ENTITY simple_textio IS
END;

ARCHITECTURE simple_behavior OF simple_textio IS
BEGIN
	PROCESS
		VARIABLE i: INTEGER:= 42;
		VARIABLE LLL: LINE;
	BEGIN
		WRITE (LLL, i);
		WRITELINE (OUTPUT, LLL);
		WAIT;
	END PROCESS;
END simple_behavior; 

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ModelSim Documentation Bookcase