change
The change command modifies the value of a VHDL variable or Verilog register variable. The simulator must be at a breakpoint or paused after a step command to change a VHDL variable.
Syntax
change
Arguments
<variable>
Specifies the name of a variable. Required. The variable name must specify a scalar type or a one-dimensional array of character enumeration. You may also specify a record subelement, an indexed array, or a sliced array as long as the type is one of the above.
<value>
Defines a value for the variable. Required. The specified value must be appropriate for the type of the variable.
Examples
change count 16#FFFF
Changes the value of the variable count to the hexadecimal value FFFF.
See also
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