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mti_GetDriverValues()
Gets the values of all drivers on a VHDL signal.
Syntax
value = mti_GetDriverValues( signal_id, length )Returns
Arguments
Description
mti_GetDriverValues() returns the values of drivers for the specified signal. The returned pointer is a pointer to statically allocated memory; therefore, this pointer must not be freed. The array element count is returned in the length parameter. If there is an error, or if the signal is in a nodebug region, or if the type of the signal is not a scalar enumeration type, then the length parameter is set to zero and no values are returned. The values in the array are overwritten on each call to mti_GetDriverValues().
mti_GetDriverValues() can be used in conjunction with mti_GetDriverNames() since the arrays returned from each function are in the same order; therefore, each driver value can be associated with a name.
mti_GetDriverValues() returns the same information as the driver value part of the output of the drivers command.
Related functions
Example
FLI code
#include <stdlib.h> #include <mti.h> typedef enum { STD_LOGIC_U, STD_LOGIC_X, STD_LOGIC_0, STD_LOGIC_1, STD_LOGIC_Z, STD_LOGIC_W, STD_LOGIC_L, STD_LOGIC_H, STD_LOGIC_D } standardLogicType; typedef struct { char * signame; mtiProcessIdT procid; mtiSignalIdT sigid; } instanceInfoT; char * convertStdLogicValue( char sigval ) { char * retval; switch ( sigval ) { case STD_LOGIC_U: retval = "'U'"; break; case STD_LOGIC_X: retval = "'X'"; break; case STD_LOGIC_0: retval = "'0'"; break; case STD_LOGIC_1: retval = "'1'"; break; case STD_LOGIC_Z: retval = "'Z'"; break; case STD_LOGIC_W: retval = "'W'"; break; case STD_LOGIC_L: retval = "'L'"; break; case STD_LOGIC_H: retval = "'H'"; break; case STD_LOGIC_D: retval = "'-'"; break; default: retval = "?"; break; } return retval; } void checkSignal( void * param ) { char ** drv_names; char * drv_values; instanceInfoT * inst = (instanceInfoT*)param; int i; mtiInt32T names_length; mtiInt32T sigval; mtiInt32T values_length; sigval = mti_GetSignalValue( inst->sigid ); mti_PrintFormatted( "Time [%d,%d] delta %d:\n Signal %s is %s\n", mti_NowUpper(), mti_Now(), mti_Delta(), inst->signame, convertStdLogicValue( sigval ) ); mti_PrintFormatted( " Drivers:\n" ); drv_names = mti_GetDriverNames( inst->sigid, &names_length ); drv_values = mti_GetDriverValues( inst->sigid, &values_length ); for ( i = 0; i < names_length; i++ ) { mti_PrintFormatted( " %s : %s\n", convertStdLogicValue(drv_values[i]), drv_names[i] ); } mti_ScheduleWakeup( inst->procid, 5 ); } void cleanupCallback( void * param ) { mti_PrintMessage( "Cleaning up...\n" ); free( param ); } void initForeign( mtiRegionIdT region, /* The ID of the region in which this */ /* foreign architecture is instantiated. */ char *param, /* The last part of the string in the */ /* foreign attribute. */ mtiInterfaceListT *generics, /* A list of generics for the foreign model.*/ mtiInterfaceListT *ports /* A list of ports for the foreign model. */ ) { instanceInfoT * inst; inst = (instanceInfoT *)malloc( sizeof(instanceInfoT) ); inst->sigid = mti_FindSignal( "/top/s1" ); inst->signame = mti_GetSignalName( inst->sigid ); inst->procid = mti_CreateProcess( "checkSignal", checkSignal, inst ); mti_ScheduleWakeup( inst->procid, 1 ); mti_AddQuitCB( cleanupCallback, inst ); mti_AddRestartCB( cleanupCallback, inst ); }HDL code
library ieee; use ieee.std_logic_1164.all; entity lower is port ( pt : INOUT std_logic := '0' ); end lower; architecture a of lower is begin p0 : process begin pt <= '1'; wait for 5 ns; pt <= 'L'; wait for 5 ns; pt <= 'W'; wait for 5 ns; end process; end a; library ieee; use ieee.std_logic_1164.all; entity top is end top; architecture a of top is signal s1 : std_logic := '0'; component lower port ( pt : INOUT std_logic ); end component; begin p1 : process begin s1 <= 'H'; wait for 5 ns; s1 <= 'L'; wait for 5 ns; s1 <= 'X'; wait for 5 ns; end process; p2 : process begin s1 <= '1'; wait for 5 ns; s1 <= '0'; wait for 5 ns; s1 <= 'W'; wait for 5 ns; end process; inst1 : lower port map ( s1 ); end a;Simulation output
% vsim -c top -foreign "initForeign for_model.sl" Reading .../modeltech/sunos5/../tcl/vsim/pref.tcl # 5.4b # vsim -foreign {initForeign for_model.sl} -c top # Loading .../modeltech/sunos5/../std.standard # Loading .../modeltech/sunos5/../ieee.std_logic_1164(body) # Loading work.top(a) # Loading work.lower(a) # Loading ./for_model.sl VSIM 1> run 1 # Time [0,1] delta 0: # Signal s1 is '1' # Drivers: # '1' : /top/inst1/p0 # '1' : /top/p2 # 'H' : /top/p1 VSIM 2> drivers /top/s1 # Drivers for /top/s1: # 1 : Signal /top/s1 # 1 : Driver /top/inst1/p0 # 1 : Driver /top/p2 # H : Driver /top/p1 # VSIM 3> run 5 # Time [0,6] delta 0: # Signal s1 is '0' # Drivers: # 'L' : /top/inst1/p0 # '0' : /top/p2 # 'L' : /top/p1 VSIM 4> drivers /top/s1 # Drivers for /top/s1: # 0 : Signal /top/s1 # L : Driver /top/inst1/p0 # 0 : Driver /top/p2 # L : Driver /top/p1 # VSIM 5> run 5 # Time [0,11] delta 0: # Signal s1 is 'X' # Drivers: # 'W' : /top/inst1/p0 # 'W' : /top/p2 # 'X' : /top/p1 VSIM 6> drivers /top/s1 # Drivers for /top/s1: # X : Signal /top/s1 # W : Driver /top/inst1/p0 # W : Driver /top/p2 # X : Driver /top/p1 # VSIM 7> quit # Cleaning up...
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