Summary (cont.)
SEARCH THE WWW!!!!!
- The WWW is full of VHDL examples, tutorials, etc.
TRY IT OUT!!!!
- If you have a question about a statement or example, try it out in the Altera Maxplus package and see what happens!
This course is about Digital System DESIGN, not VHDL. As such, we will only have 3-4 lectures about VHDL, the rest will be on design topics.
- VHDL is only a means for efficiently implementing your design - it is not interesting by itself.
- You will probably learn multiple synthesis languages in your design career - it is the digital design techniques that you use that will be common to your designs, not the synthesis language.