4 Bit Ripple Carry Adder

Cin

A(0)

Cout

B(0)

A(1)

B(1)

A(2)

B(2)

A(3)

B(3)

C(0)

C(1)

C(2)

C(3)

C(4)

Sum(0)

Sum(1)

Sum(2)

Sum(3)

Want to write a VHDL model for a 4 bit ripple carry adder. Logic equation for each full adder is: sum <=   a xor b xor ci; co     <=   (a and b) or (ci and (a or b));

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