A Hardware Engineer’s Guide to VHDL

This page and its accompanying links address the needs of those users who are new to VHDL. This VHDL tutorial assumes no prior knowledge of HDLs. The pre-requisites are hardware design experience, more than a passing acquaintance with programming languages and a willingness to learn.

VHDL is a programming language. However, throughout this tutorial we aim to map code snippets directly onto the equivalent hardware. In addition, we will encourage you to “think code” so that at the end of the tutorial you are as comfortable with VHDL code fragments as you are with schematics.

Note that we are building this tutorial incrementally with monthly releases of new topics which can be accessed from this page. This corner of the Web is split into two sections, the first providing you with a VHDL overview, the second gives you some real examples of VHDL code use. In the VHDL Backgrounder, we aim to provide you with a general appreciation of what VHDL is, and how it is used in the design process. In the Designing Hardware using VHDL section, we’re going to familiarise you with the main features of VHDL, particularly design entities. This will let you see how to design simple circuit elements in VHDL.

If you want to go beyond the material we present here, call Doulos for a free copy of VHDL PaceMaker Entry Edition, surf the rest of our Web site and book yourself onto a Doulos training course. It’s the best way to learn and it’s also the most enjoyable way to learn VHDL - learn VHDL from the VHDL experts!

VHDL Backgrounder

• What is VHDL?
• A Brief History of VHDL
• Levels of Abstraction
• Scope of VHDL
• Design Flow using VHDL
• Benefits of using VHDL

Designing Hardware using VHDL

• An Example Design Entity
• Internal Signals
• Components and Port Maps
• Plugging Chips into Sockets
• Configurations: Part 1
• Configurations: Part 2
• Order of Analysis
• Vectored Ports and Signals
• Test Benches: Part One
• Test Benches: Part Two
• Summary, so far...
• Comparing Components with Processes
• Processes
• RTL Coding
• If statement

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This page was last updated 4^th January 1999

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