Routing

• Automatic Place/Route of systems blocks is integral design of modern VLSI devices

  • Cell Libraries and macro blocks need to be designed with system level routing issues in mind

• Typically, design macro blocks to use as few routing layers as possible so that higher level routing can go completely over-the-top of the block for inter-block routing.

  • Not unusual for a macro block to only use local interconnect (silicided poly) and MET1; this reserves MET2 and higher for inter-block routing.

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