Comments
I showed the shelving buffer being updated sequentionally for illustration purposes. In reality, the following happens:
clock 1: Fetch 4 instructions, send to DRR
clock 2: DRR decodes, fetches operands, renames, issues to CRS (Central Reservation Station)
clock 3: CRS accepts issued instructions (places them in shelves). CRS then dispatches instructions which are ready to execution units (oldest instructions take precedence)