Univ of Va: Stream Memory Controller
Stream Memory controller is hardware added to DRAM interface to help with streaming memory references
Streaming memory interface looks like FIFO interface for(i=1; i < n; i++) x[i] = z[i] * (y[i] - x[i-1]); becomes for (i=1, i < n; i++) { reg = *FIFO1 * (*FIOF0 - reg); *FIFO2 = reg; }