Effect of Branch on Pipelining (cont)
Still have one bubble in Pipeline, what to do?
- Define a branch delay slot in the Instruction Set Architecture (only feasible if defining a new ISA)
- Instruction in branch delay slot (instruction after the branch) is always executed regardless of whether branch is taken or not. add r1, r2, r3 Execute beq r1, someplace Decode (detect branch) instr A Fetch
- Instruction A is always executed; usually compiler can find a useful instruction to put here
- Can always put a NOP in the branch delay slot