Parallel Decode/Instruction Issue
Need to determine for multiple instructions:
- Are the operands available, and if so, fetch them
- Which execution units do the instructions go to (choose from multiple execution units)
Superscalar implementations may use multiple stages for decode/issue
- PPC 601, PPC 604, UltraSparc take cycles, Alpha 21064 takes 3 cycles, Pentium Pro requires 4.5 cycles