Introduction to Instruction Level Parallelism (ILP)

Traditional Von Neuman Processors

(sequential issue, sequential execution)

Scalar ILP Processors

(sequential issue, parallel execution)

SuperScalar ILP Processors

(parallel issue, parallel execution)

Parallelism of Instruction Execution

Parallelism of Instruction Issue

typical implementation

Non-pipelined Processors

Processors with multiple non-pipelined EUs and pipelined processors

VLSI and superscalar processors with multiple pipelined EUs.

Next slide

Back to first slide

View graphic version