LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
--
LIBRARY EXEMPLAR;
USE EXEMPLAR.exemplar_1164.ALL;
--
LIBRARY WORK;
USE WORK.synthesis_parameters.ALL;
USE WORK.synthesis_utilities.ALL;
USE WORK.alu_operations.ALL;
USE WORK.ParFunctional.ALL;
--
ENTITY par_central_processing_unit IS
  PORT (interrupt : IN std_logic;
        read_mem, write_mem : OUT std_logic
       );
END par_central_processing_unit;
--
--
ARCHITECTURE functional OF par_central_processing_unit IS 
  TYPE cpu_states IS (initial, instr_fetch, do_one_bytes, opnd_fetch, 
                      do_indirect, do_two_bytes, do_jsr, continue_jsr, 
                      do_branch);
  SIGNAL present_state, next_state : cpu_states;
BEGIN
  clocking : PROCESS (cck, interrupt)
  BEGIN
    IF (interrupt = '1') THEN 
      present_state <= initial;
    ELSIF cck'EVENT THEN
      present_state <= next_state;
    END IF;
  END PROCESS clocking;  
  --
  sequencing : PROCESS 
    CONSTANT dis : TIME := 1 NS;
  BEGIN 
    WAIT ON present_state, interrupt;
    -- memory control and other external signals:
    read_mem <= '0'; 
    write_mem <= '0';
    WAIT FOR 1 fs;
    CASE present_state IS
      WHEN initial =>   -------------------------------------------1
        IF (interrupt = '1') THEN
          PcReset;
          next_state <= initial;
        ELSE
          -- pc to mar
          pc_on_mar_page_bus;
          pc_on_mar_offset_bus;
          MarPage;
          MarOffset;
          next_state <= instr_fetch;
        END IF;
      WHEN instr_fetch =>   ---------------------------------------2
        -- read memory into ir
        mar_on_adbus;
        read_mem <= '1';
        --*************
        WAIT FOR 10 fs;
        databus_on_dbus;
        alu_code := a_input;
        Alu;
        ShifterNoshift; 
        IrLoad;
        -- increment pc
        PcIncrement;
        next_state <= do_one_bytes;
      WHEN do_one_bytes =>   --------------------------------------3
        pc_on_mar_page_bus;
        pc_on_mar_offset_bus;
        MarPage;
        MarOffset;
        IF (ir_out (7 DOWNTO 4) /= single_byte_instructions) THEN
          next_state <= opnd_fetch;
        ELSE
          CASE ir_out (3 DOWNTO 0) IS
            WHEN cla => 
              AccZero;
            --  AccLoad;
            WHEN cma => 
              alu_code := b_compl;
              Alu;
              ShifterNoshift; 
              SrLoad;
              AccLoad;
            WHEN cmc =>
              SrCm_carry;
            WHEN asl => 
              alu_code := b_input;
              Alu;
              ShifterLeft;
              SrLoad;
              AccLoad;
            WHEN asr => 
              alu_code := b_input;
              Alu;
              ShifterRight;
              SrLoad;
              AccLoad;
            WHEN hlt =>
              halt <= '1';
            WHEN OTHERS => NULL;
          END CASE;
          next_state <= instr_fetch;
        END IF;
      WHEN opnd_fetch =>   ----------------------------------------4
        -- read memory into mar offset
        mar_on_adbus;
        read_mem <= '1';
        --****************************
        WAIT FOR 10 fs;
        databus_on_dbus;
        dbus_on_mar_offset_bus;
        MarOffset;
        IF ( ir_out (7 DOWNTO 6) /= jsr_or_bra ) THEN
          ir_on_mar_page_bus;
          MarPage;
          IF ( ir_out (4) = indirect ) THEN
            next_state <= do_indirect;
          ELSE
            next_state <= do_two_bytes;
          END IF;
        ELSE --jsr or bra, do not alter mar page
          IF ( ir_out (5) = '0' ) THEN  -- jsr
            next_state <= do_jsr;
          ELSE
            next_state <= do_branch;
          END IF;
        END IF;
        PcIncrement;
      WHEN do_indirect =>   ---------------------------------------5
        -- read actual operand from memory into mar offset
        mar_on_adbus;
        read_mem <= '1';
        --*************************
        WAIT FOR 10 fs;
        databus_on_dbus;
        dbus_on_mar_offset_bus;
        MarOffset;
        next_state <= do_two_bytes;
      WHEN do_two_bytes =>   --------------------------------------6
        IF ( ir_out (7 DOWNTO 5) = jmp ) THEN 
          PcPage;
          PcOffset;
          next_state <= instr_fetch;
        ELSIF ( ir_out (7 DOWNTO 5) = sta ) THEN
          -- mar on adbus, ac on databus, write to memory
          mar_on_adbus;
          alu_code := b_input;
          Alu;
          ShifterNoshift; 
          obus_on_dbus;
          dbus_on_databus;
          write_mem <= '1';
          next_state <= initial;
        ELSIF ( ir_out (7) = '0' ) THEN               ------ lda, and, add, sub
          -- mar on adbus, read memory for operand, perform operation
          mar_on_adbus;
          read_mem <= '1';
          --**************************
          WAIT FOR 10 fs;
          databus_on_dbus;
          IF ( ir_out (6) = '0' ) THEN                     ---- lda, and
            IF ( ir_out (5) = '0' ) THEN                     -- lda
              alu_code := a_input;
              Alu;
              ShifterNoshift; 
            ELSE                                               -- and
              alu_code := a_and_b;
              Alu;
              ShifterNoshift; 
            END IF;
          ELSE                                               ---- add, sub
            IF ( ir_out (5) = '0' ) THEN                     -- add
              alu_code := a_add_b;
              Alu; 
              ShifterNoshift;
            ELSE                                               -- sub
              alu_code := a_sub_b;
              Alu;
              ShifterNoshift;
            END IF;
          END IF;
          SrLoad;
          AccLoad;
          next_state <= initial;
        ELSE
          next_state <= initial; --never happens
        END IF;
      WHEN do_jsr =>   --------------------------------------------7
        -- write pc offset to top of subroutine
        mar_on_adbus;
        pc_offset_on_dbus;
        dbus_on_databus;
        write_mem <= '1';
        -- address of subroutine to pc
        PcOffset;
        next_state <= continue_jsr;
      WHEN continue_jsr =>   --------------------------------------8
        PcIncrement;
        next_state <= initial;
      WHEN do_branch =>   -----------------------------------------9
        IF ( all_or (sr_out AND ir_out (3 DOWNTO 0)) = '1') THEN
          PcOffset;
        END IF;
        next_state <= initial;
    END CASE;
  END PROCESS sequencing;
END functional;