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Displays information regarding SERDES receiver usage, which is implemented using the altpll megafunction in Stratix™ and Stratix™ GX devices, including parameter values you specified either by using the MegaWizard® Plug-In Manager (Tools menu) or by editing a text file. This section is omitted if the design does not include SERDES receivers.
Information is provided as follows:
| Heading | Description | Value |
|---|---|---|
| Name | Shows the instance name of the SERDES receiver. | <SERDES receiver instance> |
| Clock0 | Shows the signal source for the clock0 input of the SERDES receiver. |
<signal source name> |
| Enable0 | Shows the signal source for the enable0 input port. |
<signal source name> |
| Enable1 | Shows the signal source for the enable1 input port. |
<signal source name> |
| Data Width | Shows the data width of the output for the SERDES receiver. | <data width> |
The following example shows a portion of the Differential I/O Receiver section generated for a sample design:
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- PLDWorld - |
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