design files

Files that contain logic for a Quartus^® II project and are compiled by the Compiler. The following files are design files:

• Block Design File (.bdf)
• EDIF Input File (.edf)
• Text Design File (.tdf)
• Verilog Design File (.v)
• Verilog Quartus^® Mapping File (.vqm)
• VHDL Design File (.vhd)