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Specifies where on the current EPXA4 or EPXA10 device you want to route the input signals, output signals, and other signals (such as address and control signals) for EPXA4 or EPXA10 dual-port RAM in the following modes:
For EPXA4 or EPXA10 dual-port RAM that is in deep mode, select routing paths for the dual-port RAM signals using the following options:
Input signals | Routes the input data to either MegaLAB column 3 or 4. |
Output signals | Routes the output data to either MegaLAB column 3 or 4. Settings that contain the term "ESB" route the output data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting MegaLAB column 3ESB routes the output data to the section of MegaLAB column 3 that is adjacent to the ESB. |
Other signals | Routes the data of other signals, such as address and control signals, to either MegaLAB column 3 or 4. |
For EPXA4 or EPXA10 dual-port RAM that is in wide mode, select routing paths for the dual-port RAM signals using the following options:
Input signals | Individually routes the lower 32 bits and upper 32 bits of input data to MegaLAB column 3 or 4. Settings that contain the term "ESB" route the input data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting Lower to 3, Upper to 3ESB routes the lower 32 bits of the input data to the section of MegaLAB column 3 that is not adjacent to the ESB, and routes the upper 32 bits of the input data to the section of MegaLAB column 3 that is adjacent to the ESB. |
Output signals | Individually routes the lower 32 bits and upper 32 bits of output data to MegaLAB column 3 or 4. Settings that contain the term "ESB" route the output data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting Lower to 3, Upper to 4ESB routes the lower 32 bits of the output data to the section of MegaLAB column 3 that is not adjacent to the ESB, and routes the upper 32 bits of the output data to the section of MegaLAB column 4 that is adjacent to the ESB. |
Other signals | Routes the data of other signals, such as address and control signals, to either MegaLAB column 3 or 4. |
For EPXA4 or EPXA10 dual-port RAM that is in single-port mode, select routing paths for the dual-port RAM signals using the following options:
Input signals | Routes the input data of each single-port mode dual-port RAM to MegaLAB column 3 or 4. Settings that contain the term "ESB" route the input data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting DPRAM0 to 3, DPRAM1 to 3ESB routes the input data of DPRAM0 to the section of MegaLAB column 3 that is not adjacent to the ESB, and routes the input data of DPRAM1 to the section of MegaLAB column 3 that is adjacent to the ESB. |
Output signals | Routes the output data of each single-port mode dual-port RAM to MegaLAB column 3 or 4. Settings that contain the term "ESB" route the output data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting DPRAM0 to 3, DPRAM1 to 4ESB routes the output data of DPRAM0 to the section of MegaLAB column 3 that is not adjacent to the ESB, and routes the output data of DPRAM1 to the section of MegaLAB column 4 that is adjacent to the ESB. |
Other signals | Routes the data of other signals, such as address and control signals, of each single-port mode dual-port RAM to MegaLAB column 3 or 4. |
For EPXA4 or EPXA10 dual-port RAM that is in dual-port or two single-port mode, select routing paths for the dual-port RAM signals using the following options:
Select Dual Port in the Existing dual-port RAM routing settings list to select routing paths for dual-port RAM that is in either dual-port or two single-port mode. |
Input signals | Routes the data of input signals in DPRAM0 to MegaLAB column 3, and the data of input signals in DPRAM1 to MegaLAB column 4. |
Output signals | Routes the output data of each dual-port mode or two single-port mode dual-port RAM to MegaLAB column 3 or 4. Settings that contain the term "ESB" route the output data to the section of the MegaLAB column that is adjacent to the Embedded System Block (ESB). For example, the setting DPRAM0 to 3, DPRAM1 to 4ESB routes the output data of DPRAM0 to the section of MegaLAB column 3 that is not adjacent to the ESB, and routes the output data of DPRAM1 to the section of MegaLAB column 4 that is adjacent to the ESB. |
Other signals | Routes the data of other signals, such as address and control signals, in DPRAM0 to MegaLAB column 3, and the data of other signals in DPRAM1 to MegaLAB column 4 |
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