Procedures

Overviews

Displays a floorplan containing LogicLock^™ regions, user assignments, and fitter placement. You can enter and edit pin, logic cell, embedded cell, and I/O cell assignments to a device in the current project. The Timing Closure floorplan contains additional floorplanning features that allow you to view and edit LogicLock regions, in conjunction with other user assignments and Fitter placements, to help achieve timing closure.