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A port that is an input or output of the current file is declared in the following format within the Subdesign Section:
<port name> : <port type> [ = <default port value> ] <port type> ::= INPUT | OUTPUT | BIDIR <default port value> ::= VCC | GND
Port names that are inputs and outputs of an instance of a logic function are used in the following format:
<instance name>.<port name> <instance name> ::= <symbolic name>
- PLDWorld - |
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