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Specifies where the input data of the 32-bit single-port mode dual-port RAM is routed on the device. When the input data is routed to a MegaLAB™ column, the three MSB bits of the PLD-To-Stripe Bridge are routed to the other MegaLAB column. For example, when the input data is routed to MegaLAB column 1, the three MSB bits of the PLD-To-Stripe Bridge are routed to MegaLAB column 2.
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