Companion Materials for Dr. Chu's books

This website provides relevant materials for Dr. Chu's books. Please follow the link or tab for the desired book. The Resources tab provides additional links on FPGA and hardware description language.

 

front cover

 

 

 

 

RTL Hardware Design Using VHDL:
Coding for Efficiency, Portability
, and Salability 

 

Cover image for product 0470185317

 

 

 

 

FPGA Prototyping by VHDL Examples:
Xilinx Spartan-3 Version

 

 

 

 

FPGA Prototyping by Verilog Examples:
Xilinx Spartan-3 Version

 

 

 

 

 

Embedded SoPC Design with Nios II Processor and VHDL Examples

 

 

 

 

 

Embedded SoPC Design with Nios II Processor and Verilog Examples

 

Contact Dr. Pong P. Chu
p.chu@csuohio.no_spam (replace no_spam with edu)

Department of Electrical and Computer Engineering
2121 Euclid Avenue
Cleveland State University
Cleveland, OH 44115
Voice: 216-687-2590      Fax: 216-687-5405