EE481 Logical Design Lab
Fall 2003, Lab #6

Prelab Questions

1. Write PAL Language source code (for PALASM compiler) that implements 7-segment BCD driver for Common Anode display (e.g. a "0" turns on the display).
2. Calculate drop-resistor value for a 7-segment LED display, using LED specs given in ealier labs.
3. Crudely estimate the power consumption of a mod-8 counter including 7-segment LED display driver implemented with TTL flip-flops and the LED display driver (exclude the actual current consumed by the LED display). Crudely estimate how many wires do you need to wire this circuit?

Experiments

1. Design and implement the following circuit using a provided PAL/PLD device (PLD,PDF data file for 22v10). (Use drop resistors in series with the display.)
   
   
   
2. Count the total number of wires used for this PAL design.
3. Measure the average current that the PAL uses without having the LEDs connected and compare to your calculated estimate of the discrete logic design.
4. Are there any cost savings in using PAL over discrete logic gates? (Assume that a PAL chip costs $4.00 and all TTL logic chips costs $0.50. You can also assume that 1 square inch of a PCB costs $1.00.)
5. Would you choose to use PALs if you were a designer? If you were an accountant worried about product costs, what would you choose? This question is tricker than you think.