 | Sequential Statements-- Notes Page -- |  |
| Sequential Statements-- Notes Page -- | |
Statements in a VHDL process are executed sequentially. A process may also include a sensitivity list which is declared immediately after the PROCESS word. This sensitivity list makes the process execute when there is a transition on any of the specified signals. In the example above, the sensitivity list includes signals x, y and selector. The process can also be named; the process in the example above is named select_proc.