Let's assume that the above circuit does not specify any delays, and
that there is no delta delay mechanism in the simulator
behavior. In such a case, the order of execution of concurrent events
will be arbitrary. In such a case, if the input to the inverter has a
1 to 0 transition, and the other input to the NAND gate is a constant
1, what is the output of C?
The final answer is, of course, the same. C eventually goes to 0.
However, the transient behavior of the circuit depends on the order in
which the gates are evaluated. If the NAND gate is evaluated first,
no glitch is seen on the output of the AND gate. When A goes to 1, the
output of the NAND gate, being evaluated first, goes to 0. When the
AND gate is then evaluated, its output will also evaluate to 0, which
is its final value.
However, if the AND gate is evaluated first, a glitch is generated
because the NAND gate has not yet been updated to its new value.
Therefore, C initially goes to 1 and will only go to 0 after the NAND
gate drives its output to 0.
Therefore, if the order of execution is arbitrary, the behavior of the
system may be unpredictable. This is generally not an acceptable
situation for modeling.
[Perry94], pp. 22-24.
