\subsection{\index{addi}addi}

\index{addition immediate}
ADDition Immediate


\begin{tabular}{l}
 {\bf addi Imm8, r2, r1} \\
 {\bf saddi Imm8, r2, r1}

\end{tabular}

~~~~~~
Computes r1 = r2 + Imm8.

~~~~~~
This instruction is similar to the add'' instruction but it takes one of the
source operands from the opcode (without sign extension). It has less
room for the options and flags, so the usage of the reserved bit is still
being discussed.

~~~~~~
{ \em Remark :} with wide operands, the latency may be higher than expected
because the adder would use the full pipeline. In order to add or substract 
1 from a large number (more than 8 bits) it is recommended to use the 
inc/dec instructions (when available) because they use the increment unit 
which has a lower latency.

\begin{center}

\begin{tabular}{|l|l|l|l|l|l|}
 \hline
\multicolumn{1}{|r| }{size :
} & \multicolumn{1}{c| }{8
} & \multicolumn{1}{c| }{4
} & \multicolumn{1}{c| }{8
} & \multicolumn{1}{c| }{6
} & \multicolumn{1}{c| }{6
 } \\
 \hline
\multicolumn{1}{|r| }{bits :
} & {31 ~ ~ ~ ~ ~ ~ ~ ~ 24
} & {23 ~ ~ ~ ~ 20
} & {19 ~ ~ ~ ~ ~ ~ ~ ~ 12
} & {11 ~ ~ ~ ~ ~ ~ 6
} & {5 ~ ~ ~ ~ ~ ~ 0
 } \\
 \hline
\multicolumn{1}{|r| }{function :
} & \multicolumn{1}{c| }{OP\_ADDI
} & \multicolumn{1}{c| }{Flags
} & \multicolumn{1}{c| }{Imm8
} & \multicolumn{1}{c| }{Reg 2
} & \multicolumn{1}{c| }{Reg 1
}
\\ \hline

\end{tabular}



\begin{tabular}{|l|l|l|l|}
 \hline
\multicolumn{1}{|c| }{~ ~ Flags ~ ~
} & \multicolumn{1}{c| }{Syntax
} & {Values
} & {Function
 } \\
 \hline
\multicolumn{1}{|c| }{23-22
} & {.q, .d or .b postfix
} & {*
} & {Defines the size parameter
 } \\
 \hline
\multicolumn{1}{|c| }{21
} & {s- prefix
} & {1 if set
} & {Defines if the operation is SIMD
 } \\
 \hline
\multicolumn{1}{|c| }{20
} & {(none yet)
} & {0
} & {Reserved
}
\\ \hline

\end{tabular}


~

{\bf Examples : }
\end{center}


R2 contains 0x00F80F00F045FF82 (in a 64-bit system)

{\tt
{\bf addi.b 0x87,r2,r3 }: r3 = 0x00F80F00F045FF09\\
{\bf addi.d 0x87,r2,r3 }: r3 = 0x00F80F00F0450009\\
{\bf saddi.b 0x87,r2,r3 }: r3 = 0x877F968777CC8609\\
{\bf saddi.d 0x87,r2,r3 }: r3 = 0x017F0F87F0CC0009
}

\begin{center}
{\bf Performance (FC0 only) :}
\end{center}

{\em Execution Unit :} Add/Sub Unit\\
{\em Latency :} 1 cycle for 8-bit data, 2 cycles for 16-bit to 64-bit data\\
{\em Throughput :} 1 operation per cycle per ASU.\\

~

\pagebreak

