\subsection{\index{byterev}byterev}

\index{byte reverse}
BYTe REVerse


\begin{tabular}{l}
  {\bf byterev r2, r1} \\
  {\bf sbyterev r2, r1} \\
\end{tabular}

~~~~~~
Changes the endianness of r2 and puts the result into r1.

~~~~~~
All the versions of the F-CPU may not support dual-endianness in the
Load/Store unit, or simply the software may require internal operations of
this kind. This is optional for the minimal systems, but yet useful
in communication software. Remark, byterev.b has no use :-)

\begin{center}

\begin{tabular}{|l|l|l|l|l|l|}
 \hline
\multicolumn{1}{|r| }{size :
} & \multicolumn{1}{c| }{8
} & \multicolumn{1}{c| }{3
} & \multicolumn{1}{c| }{9
} & \multicolumn{1}{c| }{6
} & \multicolumn{1}{c| }{6
 } \\
 \hline
\multicolumn{1}{|r| }{bits :
} & {31 ~ ~ ~ ~ ~ ~ ~ ~ 24
} & {23 ~ ~ 21
} & {20 ~ ~ ~ ~ ~ ~ ~ ~ ~ 12
} & {11 ~ ~ ~ ~ ~ ~ 6
} & {5 ~ ~ ~ ~ ~ ~ 0
 } \\
 \hline
\multicolumn{1}{|r| }{function :
} & \multicolumn{1}{c| }{OP\_BYTEREV
} & \multicolumn{1}{c| }{Flags
} & \multicolumn{1}{c| }{0
} & \multicolumn{1}{c| }{Reg 2
} & \multicolumn{1}{c| }{Reg 1
}
\\ \hline

\end{tabular}


\begin{tabular}{|l|l|l|l|}
 \hline
\multicolumn{1}{|c| }{~ ~ Flags ~ ~
} & \multicolumn{1}{c| }{Syntax
} & {Values
} & {Function
 } \\
 \hline
\multicolumn{1}{|c| }{23-22
} & {.q, .d or .b postfix
} & {~
} & {Size flag
 } \\
 \hline
\multicolumn{1}{|c| }{21
} & {s- prefix
} & {1 if set
} & {Defines if the operation is SIMD
}
\\ \hline

\end{tabular}


~

{\bf Examples : }
\end{center}

R2 contains 0xFF05891213450100 (in a 64-bit system)\\
{\tt
{\bf byterev.d r2,r3 }: r3 = 0xFF05891213450001\\
{\bf byterev.q r2,r4 }: r4 = 0xFF05891200014513\\
{\bf sbyterev.d r2,r3 }: r3 = 0x05FF128945130001\\
{\bf sbyterev.q r2,r4 }: r4 = 0x128905FF00014513\\
}

\begin{center}
{\bf Performance (FC0 only) :}
\end{center}

{\em Execution Unit :} Bit Shuffling Unit\\
{\em Latency :} 1 cycle\\
{\em Throughput :} 1 per cycle per BSU.\\

~

\pagebreak



