\subsection{\index{bitop}bitop}

\index{single bit operation}
single BIT OPeration


\begin{tabular}{l}
  {\bf bitop[x/s/c/t] r3, r2, r1} \\
  {\bf sbitop[x/s/c/t] r3, r2, r1} \\
  {\bf bchg r3, r2, r1} \\
  {\bf bset r3, r2, r1} \\
  {\bf bclr r3, r2, r1} \\
  {\bf btst r3, r2, r1} \\
  {\bf sbchg r3, r2, r1} \\
  {\bf sbset r3, r2, r1} \\
  {\bf sbclr r3, r2, r1} \\
  {\bf sbtst r3, r2, r1} \\
\end{tabular}


~~~~~~
Computes r1 = F(function, r2, 1)

~~~~~~
In the shifter, a 1 is shifted left r3 times and combined with the second
operand (r2) according to the function F defined below :

\begin{center}

\begin{tabular}{|l|l|l|l|}
 \hline
\multicolumn{1}{|c| }{Function number :
} & \multicolumn{1}{c| }{Logical function :
} & \multicolumn{1}{c| }{Operation :
} & \multicolumn{1}{c| }{Opcode :
 } \\
 \hline
\multicolumn{1}{|c| }{00
} & \multicolumn{1}{c| }{AND
} & \multicolumn{1}{c| }{Bit Mask
} & \multicolumn{1}{c| }{btst or bitopt
}
\\ \hline
\multicolumn{1}{|c| }{01
} & \multicolumn{1}{c| }{ANDN
} & \multicolumn{1}{c| }{Bit Clear
} & \multicolumn{1}{c| }{bclr or bitopc
 } \\
 \hline
\multicolumn{1}{|c| }{10
} & \multicolumn{1}{c| }{XOR
} & \multicolumn{1}{c| }{Bit Change
} & \multicolumn{1}{c| }{bchg or bitopx
 } \\
 \hline
\multicolumn{1}{|c| }{11
} & \multicolumn{1}{c| }{OR
} & \multicolumn{1}{c| }{Bit Set
} & \multicolumn{1}{c| }{bset or bitops
 } \\
 \hline
\end{tabular}

\end{center}


~~~~~~
The value of r3 is truncated to the number of bits needed by the bit shuffler
unit.

\begin{center}

\begin{tabular}{|l|l|l|l|l|l|}
 \hline
\multicolumn{1}{|r| }{size :
} & \multicolumn{1}{c| }{8
} & \multicolumn{1}{c| }{6
} & \multicolumn{1}{c| }{6
} & \multicolumn{1}{c| }{6
} & \multicolumn{1}{c| }{6
 } \\
 \hline
\multicolumn{1}{|r| }{bits :
} & {31 ~ ~ ~ ~ ~ ~ ~ ~ 24
} & {23 ~ ~ ~ ~ ~ ~ 18
} & {17 ~ ~ ~ ~ ~ ~ 12
} & {11 ~ ~ ~ ~ ~ ~ 6
} & {5 ~ ~ ~ ~ ~ ~ 0
 } \\
 \hline
\multicolumn{1}{|r| }{function :
} & \multicolumn{1}{c| }{OP\_BITOP
} & \multicolumn{1}{c| }{Flags
} & \multicolumn{1}{c| }{Reg 3
} & \multicolumn{1}{c| }{Reg 2
} & \multicolumn{1}{c| }{Reg 1
}
\\ \hline

\end{tabular}



\begin{tabular}{|l|l|l|l|}
 \hline
\multicolumn{1}{|c| }{~ ~ Flags ~ ~
} & \multicolumn{1}{c| }{Syntax
} & {Values
} & {Function
 } \\
 \hline
\multicolumn{1}{|c| }{23-22
} & {.q, .d or .b postfix
} & {*
} & {Defines the size parameter
 } \\
 \hline
\multicolumn{1}{|c| }{21
} & {s- prefix
} & {1 if set
} & {Defines if the operation is SIMD
 } \\
 \hline
\multicolumn{1}{|c| }{20
} & {(none yet)
} & {0
} & {Reserved
 } \\
 \hline
\multicolumn{1}{|c| }{19-18
} & {x, c, t or s
} & {00-11
} & {F
}
\\ \hline

\end{tabular}


~

{\bf Example : }
\end{center}


R1 contains 0x08\\
R2 contains 0xFF05891213450100 (in a 64-bit system)

{\tt
{\bf bchg r1,r2,r3 }: r3 = 0xFF05891213450000\\
{\bf bset r1,r2,r3 }: r3 = 0xFF05891213450100\\
{\bf bclr r1,r2,r3 }: r3 = 0xFF05891213450000\\
{\bf btst r1,r2,r3 }: r3 = 0x0000000000000100\\
}

\begin{center}
{\bf Performance (FC0 only) :}
\end{center}

{\em Execution Unit :} Bit Shuffling Unit\\
{\em Latency :} 1 cycle\\
{\em Throughput :} 1 per cycle per BSU.\\

~

\pagebreak

