Data Flow graphs combined with autocoding techniques are an advanced graphical method for programming networks of processors for signal processor applications. Currently, complete development of a signal processor system beginning with system engineering through the actual software can be accomplished using methodologies and simulation and software design tools developed under the Rapid Prototyping of Application-Specific Signal Processors (RASSP) program. In this application note the key issues and concerns involved in developing such an application are explored so the software developed by the autocoding tools will yield a cost effective signal processor (minimum number of processors and memory usage). The design techniques presented in this paper are based upon Data Flow techniques and implementation. These will be illustrated by two applications the Synthetic Aperture Radar (SAR) signal processor and the Sonar Echo Tracker and Classifier (ETC) processor.
The presentation of procedure and design methodology that can take a general signal processing problem and convert it to a data flow design is the purpose of this application note. The Data Flow graphs are implemented by a Hardware/Software codesign process where portions of the Data Flow graph will be directly mapped to software running on DSP processors and portions such as input processing directed to hardware. This application note will also discuss a tool from Lockheed Martin ATL which provides the functional simulation as well as the autocoding to target DSP processors called GEDAE™. Using the Data Flow graph technology and the associated tool, the complete software development cycle including documentation and coding is shown to be significantly reduced. The resultant software product is also more maintainable than a conventional software approach.
1.0 Executive Summary
2.0 Introduction to Graphical Data Flow Description
3.0 Introduction to Data Flow Graph Design
10.0 References
Approved for Public Release; Distribution Unlimited Dennis Basara