Interpreting the Under(%) and In(%) Fields

The In(%) and Under(%) columns describe the percentage of the total simulation time spent in and under a function listed in the Name field.

The distinction between In(%) and Under(%) is subtle but important. For the retrieve.vhd:35 entry in the hierarchical and ranked views above, Under(%) is 44 and In(%) is 10. "Under(%)" means that this particular line and all support routines it needed took 44% of total simulation time. "In(%)" means that 10% of the total simulation time was actually spent executing this line of VHDL code.

In the body of the Hierarchical Profile or Ranked Profile windows, you can double-click on any VHDL/Verilog file and line-number pair to bring up that file in the Source Window with the selected line highlighted. In the diagram below, retrieve.vhd:35 was selected in the Hierarchical Profile and, consequently, is highlighted in the Source window.

The actual line of VHDL code for retrieve.vhd:35 is:

IF (i=ramadrs((counter_size-1)downto 0))THEN 

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