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[vcom] VHDL compiler control variables

Variable name
Value range
Purpose
Default
CheckSynthesis
0, 1
if 1, turns on limited synthesis rule compliance checking; checks only signals used (read) by a process
off (0)
Explicit
0, 1
if 1, turns on resolving of ambiguous function overloading in favor of the "explicit" function declaration (not the one automatically created by the compiler for each type declaration)
on (1)
IgnoreVitalErrors
0, 1
if 1, ignores VITAL compliance checking errors
off (0)
NoCaseStaticError
0, 1
if 1, changes case statement static errors to warnings
off (0)
NoDebug
0, 1
if 1, turns off inclusion of debugging info within design units
off (0)
NoOthersStaticError
0, 1
if 1, disables errors caused by aggregates that are not locally static
off (0)
NoVital
0, 1
if 1, turns off acceleration of the VITAL packages
off (0)
NoVitalCheck
0, 1
if 1, turns off VITAL compliance checking
off (0)
Optimize_1164
0, 1
if 0, turns off optimization for IEEE std_logic_1164 package
on (1)
Quiet
0, 1
if 1, turns off "loading..." messages
off (0)
RequireConfigForAllDefaultBinding
0, 1
if 1, instructs the compiler not to generate a default binding during compilation
off (0)
ScalarOpts
0, 1
if 1, activates optimizations on expressions that don't involve signals, waits or function/procedure/task invocations
off (0)
Show_source
0, 1
if 1, shows source line containing error
off (0)
Show_VitalChecksWarnings
0, 1
if 0, turns off VITAL compliance-check warnings
on (1)
Show_Warning1
0, 1
if 0, turns off unbound-component warnings
on (1)
Show_Warning2
0, 1
if 0, turns off process-without-a-wait-statement warnings
on (1)
Show_Warning3
0, 1
if 0, turns off null-range warnings
on (1)
Show_Warning4
0, 1
if 0, turns off no-space-in-time-literal warnings
on (1)
Show_Warning5
0, 1
if 0, turns off multiple-drivers-on-unresolved-signal warnings
on (1)
VHDL93
0, 1
if 1, turns on VHDL-1993
off (0)


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