Source code security and -nodebug

Model Technology Inc.

Source code security and -nodebug

The -nodebug option on both vcom and vlog hides internal model data. This allows a model supplier to provide pre-compiled libraries without providing source code and without revealing internal model variables and structure.

Note: ModelSim's -nodebug compiler option provides protection for proprietary model information. The Verilog protect compiler directive provides similar protection, but uses a Cadence encryption algorithm that is unavailable to Model Technology.

If a design unit is compiled with -nodebug the Source window will not display the design unit's source code, the Structure window will not display the internal structure, the Signals window will not display internal signals (it still displays ports), the Process window will not display internal processes, and the Variables window will not display internal variables. In addition, none of the hidden objects may be accessed through the Dataflow window or with ModelSim commands.

Even with the data hiding of -nodebug, there remains some visibility into models compiled with -nodebug. The names of all design units comprising your model are visible in the library, and you may invoke vsim directly on any of these design units and see the ports. Design units or modules compiled with -nodebug can only instantiate design units or modules that are also compiled -nodebug

To restrict visibility into the lower levels of your design you can use the following nodebug switches when you compile.

Command and switch

Result

vcom -nodebug=ports

makes the ports of a VHDL design unit invisible

vlog -nodebug=ports

makes the ports of a Verilog design unit invisible

vlog -nodebug=pli

prevents the use of PLI functions to interrogate the module for information

vlog -nodebug=ports+pli
(or =pli+ports)

combines the functions of -nodebug=ports and -nodebug=pli

Note: Don't use the =ports switch on a design without hierarchy, or on the top level of a hierarchical design; if you do, no ports will be visible for simulation. To properly use the switch, compile all lower portions of the design with -nodebug=ports first, then compile the top level with nodebug alone.

Also note the =pli switch will not work with vcom (the VHDL compiler). PLI functions are valid only for Verilog design units.

			Note: ModelSim's -nodebug compiler option provides protection for proprietary model information. The Verilog protect compiler directive provides similar protection, but uses a Cadence encryption algorithm that is unavailable to Model Technology.

Command and switch	Result
vcom -nodebug=ports	makes the ports of a VHDL design unit invisible
vlog -nodebug=ports	makes the ports of a Verilog design unit invisible
vlog -nodebug=pli	prevents the use of PLI functions to interrogate the module for information
vlog -nodebug=ports+pli (or =pli+ports)	combines the functions of -nodebug=ports and -nodebug=pli

			Note: Don't use the =ports switch on a design without hierarchy, or on the top level of a hierarchical design; if you do, no ports will be visible for simulation. To properly use the switch, compile all lower portions of the design with -nodebug=ports first, then compile the top level with nodebug alone. Also note the =pli switch will not work with vcom (the VHDL compiler). PLI functions are valid only for Verilog design units.

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