Documentation conventions

This manual uses the following conventions to define ModelSim command syntax

Syntax notation	Description
< >	angled brackets surrounding a syntax item indicate a user-defined argument; do not enter the brackets in commands
[ ]	square brackets generally indicate an optional item; if the brackets surround several words, all must be entered as a group; the brackets are not entered1
{ }	braces indicate that the enclosed expression contains one or more spaces yet should be treated as a single argument, or that the expression contains square brackets for an index; for either situation, the braces are entered
...	an ellipsis indicates items that may appear more than once; the ellipsis itself does not appear in commands
|	the vertical bar indicates a choice between items on either side of it; do not include the bar in the command
monospaced type	monospaced type is used in command examples
#	comments included with commands are preceded by the number sign (#); useful for adding comments to DO files (macros)

1 One exception to this rule is when you are using Verilog syntax to designate an array slice. For example, add wave {vector1[4:0]} The square brackets in this case denote an index. The braces prevents the Tcl interpreter from treating the text within the square brackets as a Tcl command.

Note: Neither the prompt at the beginning of a line nor the <Enter> or <Return> key that ends a line is shown in the command examples.

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