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mti_GetVarValueIndirect()
Gets the value of a VHDL variable of any type except record.
Syntax
value = mti_GetVarValueIndirect( variable_id, buffer )Returns
Name Type Description value void * A pointer to the value of the specified variableArguments
Name Type Description variable_id mtiVariableIdT A handle to a VHDL variable of any type except record buffer void * A buffer into which the value is to be placed; OPTIONAL - can be NULLDescription
mti_GetVarValueIndirect() returns the value of a variable of any type except record. mti_GetVarValueIndirect() must be used for scalar variables of type real and time.
If the buffer parameter is NULL, mti_GetVarValueIndirect() returns a pointer to the value, which must be treated as read-only data and must not be freed.
If the buffer parameter is not NULL, mti_GetVarValueIndirect() copies the value in the buffer parameter and also returns the buffer parameter.
The returned value is interpreted as follows:
Note:
In order to get the value of a record variable, use mti_GetVarSubelements() to get handles to the variable subelements and then use mti_GetVarValue(), mti_GetVarValueIndirect(), or mti_GetArrayVarValue() on each of the subelements.![]()
Related functions
Example
FLI code
#include <mti.h> typedef struct varInfoT_tag { struct varInfoT_tag * next; char * name; mtiVariableIdT varid; mtiTypeIdT typeid; } varInfoT; typedef struct { varInfoT * var_info; /* List of variables. */ mtiProcessIdT proc; /* Test process id. */ } instanceInfoT; static void printValue( mtiVariableIdT varid, mtiTypeIdT vartype, int indent ) { switch ( mti_GetTypeKind( vartype ) ) { case MTI_TYPE_ENUM: { char ** enum_values; enum_values = mti_GetEnumValues( vartype ); if ( mti_TickLength( vartype ) > 256 ) { mtiInt32T scalar_val; (void) mti_GetVarValueIndirect( varid, &scalar_val ); mti_PrintFormatted( " %s\n", enum_values[scalar_val] ); } else { char scalar_val; (void) mti_GetVarValueIndirect( varid, &scalar_val ); mti_PrintFormatted( " %s\n", enum_values[(int)scalar_val] ); } } break; case MTI_TYPE_PHYSICAL: case MTI_TYPE_SCALAR: { mtiInt32T scalar_val; scalar_val = mti_GetVarValue( varid ); mti_PrintFormatted( " %d\n", scalar_val ); } break; case MTI_TYPE_ARRAY: { int i; mtiInt32T num_elems; mtiTypeIdT elem_type; mtiTypeKindT elem_typekind; void * array_val; array_val = mti_GetArrayVarValue( varid, 0 ); num_elems = mti_TickLength( vartype ); elem_type = mti_GetArrayElementType( vartype ); elem_typekind = mti_GetTypeKind( elem_type ); switch ( elem_typekind ) { case MTI_TYPE_ENUM: { char ** enum_values; enum_values = mti_GetEnumValues( elem_type ); if ( mti_TickLength( elem_type ) > 256 ) { mtiInt32T * val = array_val; for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( " %s", enum_values[val[i]] ); } } else { char * val = array_val; for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( " %s", enum_values[val[i]] ); } } } break; case MTI_TYPE_PHYSICAL: case MTI_TYPE_SCALAR: { mtiInt32T * val = array_val; for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( " %d", val[i] ); } } break; case MTI_TYPE_ARRAY: mti_PrintMessage( " ARRAY" ); break; case MTI_TYPE_RECORD: mti_PrintMessage( " RECORD" ); break; case MTI_TYPE_REAL: { double * val = array_val; for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( " %g", val[i] ); } } break; case MTI_TYPE_TIME: { mtiTime64T * val = array_val; for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( " [%d,%d]", MTI_TIME64_HI32(val[i]), MTI_TIME64_LO32(val[i]) ); } } break; default: break; } mti_PrintFormatted( "\n" ); } break; case MTI_TYPE_RECORD: { int i; mtiVariableIdT * elem_list; mtiInt32T num_elems; elem_list = mti_GetVarSubelements( varid, 0 ); num_elems = mti_GetNumRecordElements( vartype ); mti_PrintFormatted( "\n" ); for ( i = 0; i < num_elems; i++ ) { mti_PrintFormatted( "%*c", indent, ' ' ); printValue( elem_list[i], mti_GetVarType(elem_list[i]), indent+2 ); } mti_VsimFree( elem_list ); } break; case MTI_TYPE_REAL: { double real_val; mti_GetVarValueIndirect( varid, &real_val ); mti_PrintFormatted( " %g\n", real_val ); } break; case MTI_TYPE_TIME: { mtiTime64T time_val; mti_GetVarValueIndirect( varid, &time_val ); mti_PrintFormatted( " [%d,%d]\n", MTI_TIME64_HI32(time_val), MTI_TIME64_LO32(time_val) ); } break; default: mti_PrintMessage( "\n" ); break; } } static void checkValues( void *inst_info ) { instanceInfoT *inst_data = (instanceInfoT *)inst_info; varInfoT *varinfo; mti_PrintFormatted( "Time [%d,%d]:\n", mti_NowUpper(), mti_Now() ); for ( varinfo = inst_data->var_info; varinfo; varinfo = varinfo->next ) { mti_PrintFormatted( " Variable %s:", varinfo->name ); printValue( varinfo->varid, varinfo->typeid, 4 ); } mti_ScheduleWakeup( inst_data->proc, 5 ); } static varInfoT * setupVariable( mtiVariableIdT varid ) { varInfoT * varinfo; varinfo = (varInfoT *) mti_Malloc( sizeof(varInfoT) ); varinfo->varid = varid; varinfo->name = mti_GetVarName( varid ); varinfo->typeid = mti_GetVarType( varid ); varinfo->next = 0; return( varinfo ); } static void initInstance( void ) { instanceInfoT * inst_data; mtiProcessIdT procid; mtiVariableIdT varid; varInfoT * curr_info; varInfoT * varinfo; inst_data = mti_Malloc( sizeof(instanceInfoT) ); inst_data->var_info = 0; for ( procid = mti_FirstProcess( mti_GetTopRegion() ); procid; procid = mti_NextProcess() ) { for ( varid = mti_FirstVar( procid ); varid; varid = mti_NextVar() ) { varinfo = setupVariable( varid ); if ( inst_data->var_info == 0 ) { inst_data->var_info = varinfo; } else { curr_info->next = varinfo; } curr_info = varinfo; } } inst_data->proc = mti_CreateProcess( "Test Process", checkValues, (void *)inst_data ); mti_ScheduleWakeup( inst_data->proc, 6 ); } void initForeign( mtiRegionIdT region, /* The ID of the region in which this */ /* foreign architecture is instantiated. */ char *param, /* The last part of the string in the */ /* foreign attribute. */ mtiInterfaceListT *generics, /* A list of generics for the foreign model.*/ mtiInterfaceListT *ports /* A list of ports for the foreign model. */ ) { mti_AddLoadDoneCB( initInstance, 0 ); }HDL code
entity for_model is end for_model; architecture a of for_model is attribute foreign of a : architecture is "initForeign for_model.sl;"; begin end a; library ieee; use ieee.std_logic_1164.all; entity top is type bitarray is array( 3 downto 0 ) of bit; type intarray is array( 1 to 3 ) of integer; type realarray is array( 1 to 2 ) of real; type timearray is array( -1 to 0 ) of time; type rectype is record a : bit; b : integer; c : real; d : std_logic; e : bitarray; end record; end top; architecture a of top is component for_model end component; for all : for_model use entity work.for_model(a); begin inst1 : for_model; p1 : process variable bitsig : bit := '1'; variable intsig : integer := 21; variable realsig : real := 16.35; variable timesig : time := 5 ns; variable stdlogicsig : std_logic := 'H'; variable bitarr : bitarray := "0110"; variable stdlogicarr : std_logic_vector( 1 to 4 ) := "01LH"; variable intarr : intarray := ( 10, 11, 12 ); variable realarr : realarray := ( 11.6, 101.22 ); variable timearr : timearray := ( 15 ns, 6 ns ); variable rec : rectype := ( '0', 1, 3.7, 'H', "1001" ); begin bitsig := not bitsig; intsig := intsig + 1; realsig := realsig + 1.5; timesig := timesig + 1 ns; stdlogicsig := not stdlogicsig; bitarr := not bitarr; intarr(1) := intarr(1) + 1; intarr(2) := intarr(2) + 1; intarr(3) := intarr(3) + 1; realarr(1) := realarr(1) + 0.5; realarr(2) := realarr(2) + 0.5; timearr(-1) := timearr(-1) + 1 ns; timearr(0) := timearr(0) + 1 ns; stdlogicarr := not stdlogicarr; rec.a := not rec.a; rec.b := rec.b + 1; rec.c := rec.c + 2.5; rec.d := not rec.d; rec.e := not rec.e; wait for 5 ns; end process; end a;Simulation output
% vsim -c top Reading .../modeltech/sunos5/../tcl/vsim/pref.tcl # 5.4b # vsim -c top # Loading .../modeltech/sunos5/../std.standard # Loading .../modeltech/sunos5/../ieee.std_logic_1164(body) # Loading work.top(a) # Loading work.for_model(a) # Loading ./for_model.sl VSIM 1> run 12 # Time [0,6]: # Variable bitsig: '1' # Variable intsig: 23 # Variable realsig: 19.35 # Variable timesig: [0,7] # Variable stdlogicsig: '1' # Variable bitarr: '0' '1' '1' '0' # Variable stdlogicarr: '0' '1' '0' '1' # Variable intarr: 12 13 14 # Variable realarr: 12.6 102.22 # Variable timearr: [0,17] [0,8] # Variable rec: # '0' # 3 # 8.7 # '1' # '1' '0' '0' '1' # Time [0,11]: # Variable bitsig: '0' # Variable intsig: 24 # Variable realsig: 20.85 # Variable timesig: [0,8] # Variable stdlogicsig: '0' # Variable bitarr: '1' '0' '0' '1' # Variable stdlogicarr: '1' '0' '1' '0' # Variable intarr: 13 14 15 # Variable realarr: 13.1 102.72 # Variable timearr: [0,18] [0,9] # Variable rec: # '1' # 4 # 11.2 # '0' # '0' '1' '1' '0' VSIM 2> quit
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