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mti_RemoveSaveCB()
Removes a simulator checkpoint callback.
Syntax
mti_RemoveSaveCB( func, param )Returns
Arguments
Description
mti_RemoveSaveCB() removes the specified function from the simulator checkpoint callback list. The param parameter must be the same parameter that was specified in the call to mti_AddSaveCB() when the callback was created.
Related functions
Example
FLI code
#include <stdlib.h> #include <mti.h> static char * instance_info; void saveCallback( void * param ) { char * inst_info = (char *)param; if ( param ) { mti_PrintFormatted( "Saving instance info \"%s\"\n", inst_info ); mti_SaveString( inst_info ); } else { mti_PrintFormatted( "Save in progress ...\n" ); } } void restoreCallback( void * param ) { char * inst_info = (char *)param; strcpy( inst_info, mti_RestoreString() ); mti_PrintFormatted( "Restored instance info \"%s\"\n", instance_info ); } void cleanupCallback( void * param ) { mti_PrintMessage( "Cleaning up...\n" ); free( param ); } void loadDoneCallback( void * param ) { if ( (int)param == 1 ) { mti_RemoveSaveCB( saveCallback, 0 ); } } void initForeign( mtiRegionIdT region, /* The ID of the region in which this */ /* foreign architecture is instantiated. */ char *param, /* The last part of the string in the */ /* foreign attribute. */ mtiInterfaceListT *generics, /* A list of generics for the foreign model.*/ mtiInterfaceListT *ports /* A list of ports for the foreign model. */ ) { instance_info = malloc( strlen(param) + 1 ); strcpy( instance_info, param ); mti_AddSaveCB( saveCallback, instance_info ); mti_AddSaveCB( saveCallback, 0 ); mti_AddRestoreCB( restoreCallback, instance_info ); mti_AddQuitCB( cleanupCallback, instance_info ); mti_AddRestartCB( cleanupCallback, instance_info ); if ( mti_IsFirstInit() ) { mti_AddLoadDoneCB( loadDoneCallback, 0 ); } else { mti_AddLoadDoneCB( loadDoneCallback, 1 ); } }HDL code
entity for_model is end for_model; architecture a of for_model is attribute foreign of a : architecture is "initForeign for_model.sl; for_model"; begin end a; entity top is end top; architecture a of top is signal s1 : bit := '0'; component for_model is end component; for all : for_model use entity work.for_model(a); begin i1 : for_model; s1 <= not s1 after 5 ns; end a;Simulation output
% vsim -c top Reading .../modeltech/sunos5/../tcl/vsim/pref.tcl # 5.4b # vsim -c top # Loading .../modeltech/sunos5/../std.standard # Loading work.top(a) # Loading work.for_model(a) # Loading ./for_model.sl VSIM 1> run 35 VSIM 2> checkpoint cpfile # Saving instance info "for_model" # Save in progress ... VSIM 3> run 40 VSIM 4> restore cpfile # Loading checkpoint/restore data from file "cpfile" # Checkpoint created Fri Jul 7 15:31:29 2000 # Restoring state at time 35 ns, iteration 1 # Restored instance info "for_model" VSIM 5> run 15 VSIM 6> restart -f # Cleaning up... # Loading ./for_model.sl VSIM 7> run 50 VSIM 8> checkpoint cp2 # Saving instance info "for_model" VSIM 9> run 35 VSIM 10> restore cp2 # Loading checkpoint/restore data from file "cp2" # Checkpoint created Fri Jul 7 15:31:48 2000 # Restoring state at time 50 ns, iteration 1 # Restored instance info "for_model" VSIM 11> run 10 VSIM 12> quit # Cleaning up...
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