Keyword: SIGNAL
Signal declares a signal of a specified type.
A signal declaration includes—in this order—the reserved word "signal", the name of the signal, the subtype of the signal, an optional indication of the signal’s kind (which must be either "register" or "bus"), and optionally, an expression specifying the initial value of the signal.
Signals declared within an entity are visible in the corresponding architecture(s).
Note: A signal cannot be declared within a process, procedure or function.
Example
architecture behavior of fsm is
signal current_state: state;
signal DataBuf: std_logic_vector(15 downto 0);
begin
...
end behavior;
LRM
4.3
See also
