Keyword: ENTITY

An entity declaration used to describe the interface of a design entity.

A design entity is an abstract model of a digital system. A design entity includes:

(1) an entity declaration (which specifies the name of the entity and its interface ports), and

(2) at least one architecture body (which models the internal workings of the digital system).

An entity declaration includes—in this order—the reserved word "entity", the entity’s name, the reserved word "is", the following optional statements:

(1) the reserved word "generic" followed by a list of generics and their types,

(2) the reserved word "port" followed by a list of interface port names and their types,

(3) any declaration of entity items,

(4) the reserved word "begin" followed by appropriate entity declaration statements, and

(5) non-optionally, the reserved word "end" followed (optionally) by the entity’s name.

The ports of an entity are visible within the architecture(s) of the entity, and may be referenced (have their values read, or have values assigned to them, depending on their mode) as signals within the architecture(s).

Declarations made within an entity statement are visible within the corresponding architecture(s).

Example

entity Mux is

generic(RISE, FALL: time := 0 ns);

port(A,B: in std_ulogic;

Sel: in std_ulogic;

Y: out std_ulogic);

end Mux;

LRM

1.1