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DateVersComments
05/01/00 The third Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray118/gray118.pdf.
04/07/000.93 Added a synthesizable Verilog version of XSOC/xr16 to the project:
Added xsocv.pdf, xsocv\ (synthesizable Verilog XSOC/xr16).
Added tests\ (xr16 test suite).
Added contrib file.
Updated Getting Started Guide, issues, and other files.
Fixed issues #10,15,18-20.
04/05/00 The second Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray117/gray117.pdf.
03/23/00 The first Circuit Cellar article is now available at http://www.circuitcellar.com/pastissues/articles/gray116/gray116.pdf.
03/20/000.92 Added doc\xsoc-talk.pdf
Misc fixes to Getting Started Guide: DOS prompts, PATHs.
Removed encryption from doc\*.pdf.
Fixed issues #12-13.
03/13/000.91 Minor documentation fixes, most in Getting Started Guide
03/09/000.90 Beta test begins. Please remember to report your beta test experiences to fpga-cpu @egroups.com. Thank you.

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Last updated: Feb 03 2001