µðÁöÅ» ½Ã½ºÅÛ ¼³°è Ư·Ð (Digital Systems Design)

Spring Semester 2002 ÀϹݴëÇпø ÄÄÇ»ÅÍ°øÇÐÀü°ø (Ãæ³²´ëÇб³)

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°­ÀÇ´ã´ç±³¼ö:

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°­ÀÇ ÀÚ·á:

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µðÁöÅÐ ½Ã½ºÅÛ ¼³°èÀÇ ÇÑ°¡Áö ¹æ¹ýÀÎ RTL HDLÀ» »ç¿ëÇÑ ¼³°è ¹æ¹ýÀ» ÀÍÈù´Ù. ƯÈ÷, ¸¹ÀÌ »ç¿ëµÇ°í ÀÖ´Â RTL HDLÀÇ ÇϳªÀÎ VHDLÀ» ÀÌ¿ëÇÏ¿©, µðÁöÅРȸ·Î ¹× ½Ã½ºÅÛÀ» ¼³°èÇÏ°í , ½Ã¹Ä·¹À̼ÇÀ» ÅëÇÏ¿© °ËÁõÇÏ´Â ¹æ¹ýÀ» ÀÍÈù´Ù. µðÁöÅÐ ½Ã½ºÅÛÀÇ ÄÄÆ÷³ÍÆ®ÀÎ RAM, ROM, ALU, MUX, Register, Shifter, FSM µî¿¡ ´ëÇÑ ´Ù¾çÇÑ ±â¼ú ¹æ¹ý°ú ±× Â÷ÀÌÁ¡À» Å͵æÇÑ´Ù.

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ÁÖ ±³Àç:

TITLE: µðÁöÅÐ ½Ã½ºÅÛ ¼³°è¸¦ À§ÇÑ VHDL
AUTHOR: ±è¿µÃ¶ , Á¤¿¬¸ð, Á¶ÁßÈÖ, È«À±½Ä °øÀú
PUBLISHER: È«¸ª°úÇÐÃâÆÇ»ç

TITLE: VHDL ±âÃÊ¿Í ÀÀ¿ë
PUBLISHER: È«¸ª°úÇÐÃâÆÇ»ç

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Âü°í¹®Çå:

  1. Zainalabedin Navabi, "VHDL", McGraw-Hill
  2. Douglas J. Smith, "HDL Chip Design", Doone Publications
  3. VHDL Answers to FAQ, by Ben Cohen
  4. Digital Design and Modeling with VHDL and Synthesis

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