Hierarchical Design

The importance of using a structured approach when writing computer programs can be outlined by explaining some of the benefits such an approach can bring to both the writer and others wishing to understand the code.

Benefits of Hierarchical Design

• improved structure and understanding
• simpler update and modification
• controlling the complexity - "divide and conquer". By splitting the design task into smaller, more manageable chunks which can be systematically designed, the overall design process becomes less daunting
• team work is made easier by assigning individual tasks amongst several designers
• each designer can use his/her individual programming style. In Verilog, this feature is particularly important - each module can be written at a different level (behavioural, dataflow, gate or switch)
• by using multiple module instantiations instead of re-writing the same piece of code every time it is needed in the design, we can make the code shorter and more concise
• by considering each module as a building block, we can use it to create higher level blocks which can perform more complicated tasks.

In Verilog, a structured approach is perhaps even more important than in other languages, given the complexity of many large digital system designs. Hierarchical design involves creating a structure around which the final program can be created.

There are two main design methodologies which can be implemented during this process:

top-down

First, we define the top-level block and identify the sub-blocks necessary to build it. We then subdivide each sub-block until we have reduced the design to its leaf cell level, when it cannot be contructively further reduced.

bottom-up

We start by identifying the building blocks that are available to us. We then use these to create higher level blocks. This process is continued until the top-level block is defined.

Usually, a combination of the two methodologies is used when creating a digital system design.

Example: 4-bit binary counter

The structural diagram below shows the main building blocks required to construct a 4-bit binary counter. However, details such as AND gates and invertors have been neglected here for simplicity. The purpose of this schematic is to illustrate how the design can be broken down into its constituent parts, and the same basic module can be instantiated several times in the design.

Also, by considering the fact that the ET flip flop module could be written at behavioural level, for instance, while the multiplexor module could be written at gate level, it is easy to see the benefits outlined above under "programming style".

In Verilog, these blocks are known as modules, and are constructed with the keywords module and endmodule, as follows:

module my_module;

...

endmodule // my_module

An important rule in Verilog is the non-recursive nature of modules - it is illegal to have one module/endmodule construction inside another module/endmodule block.

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