PPT Slide

- sum equations to add cnta + cntb

-- sum = a xor b xor ci

-- cout = (a and b) or Ci(a or b)

-- bit 0, no carry in

sum(0) <= cnta(0) xor cntb(0);

c1 <= cnta(0) and cntb(0);

-- bit 1, c1 is carry in

sum(1) <= cnta(1) xor cntb(1) xor c1;

c2 <= (cnta(1) and cntb(1)) or (c1 and (cnta(1) or cntb(1)));

-- bit 2, c2 is carry in

sum(2) <= cnta(2) xor cntb(2) xor c2;

c3 <= (cnta(2) and cntb(2)) or (c2 and (cnta(2) or cntb(2)));

-- bit 3 is carry3 since no counter bits

sum(3) <= c3;

end a;

“dpatha” adder equations.

We could have simply written:

sum <= cnta + cntb;

This is a valid operation in VHDL!