-- +-----------------------------+
-- |    Copyright 1996 DOULOS    |
-- |     Library: arithmetic     |
-- |    designer : Tim Pagden    |
-- |     opened: 30 Jul 1996     |
-- +-----------------------------+

-- Function: 22-bit scaler block, multiplies 22-bit 2sC input by -8..-1,0..7

library ieee;
  use ieee.std_logic_1164.all;

entity scaler_4s_22s_negate_out is
port (
  a       : in  std_logic_vector(21 downto 0);
  b       : in  std_logic_vector(3 downto 0);
  negate  : out std_logic;
  y       : out std_logic_vector(24 downto 0)
);
end scaler_4s_22s_negate_out;

--  FUNCTIONALITY:-
-- INPUT B  shift for Left shift for Right  operation
--          adder input    adder input
--   7        x8              x1             8 - 1
--   6        x8              x2             8 - 2
--   5        x4              x1             4 + 1
--   4        x4              x0             4 + 0
--   3        x4              x1             4 - 1
--   2        x4              x2             4 - 2
--   1        x0              x1             0 + 1
--   0        x0              x0           - 0 + 0

--  -1        x0              x1          - (0 + 1)
--  -2        x0              x2          - (0 + 2)
--  -3        x4              x1          - (4 - 1)
--  -4        x4              x0          - (4 - 0)
--  -5        x4              x1          - (4 + 1)
--  -6        x4              x2          - (4 + 2)
--  -7        x8              x1          - (8 - 1)
--  -8        x8              x1          - (8 - 0)