# # Rcsid[] = "$Id: exercise.mss,v 2.1 1993/10/06 01:01:38 alex Exp $"; # Several class exercises suggest themselves for the GL85 model. Firstly, a more thorough checkout can be accomplished. The vector file provided consists of about 2200 design verification vectors and, although all of the distinct op-codes (about 72) have been checked and examined, there are no doubt numerous design errors that have escaped detection by these vectors. In particular, the interrupt unit could use considerable additional check-out. Other suggested exercises include: 1. Clean up the VHDL. Both the behavioral and structural models can be streamlined. There is much repetition of VHDL code in the behavioral model. 2. Create RTL models of some of the structural models, e.g., the M-state and t-state state machines, and substitute these for the structural models. Check results by comparing simulation results of the RTL against the original structural model. Then compare simulation re- sults of the full GL85 structural model against the modified model. The GL85.spt simulation output results can be used for comparison. 3. Busses are implemented using open-collector circuits. Redesign it to use tri-states instead. 4. The structural model has considerable asynchronous behavior. Redesign it to be more (or completely) synchronous. Then, make it scannable. Note that there are two different 8-bit register macros. 5. Synthesize some (or all) of the structural modules and compare them with hand-crafted modules for such things as gate count, etc. 6. The model was designed, and delays assigned, with arbitrary logic elements just so as to make it work. Redesign it using a real library of macro-cells. 7. This model behaves according to clocking described in the Intel MCS-85 Intel manual. The initial microprocessor was designed around 1976 when silicon was quite expensive. Hence, the counter, for example, is also used occasionally as a temp register in order to save on logic. Add resources to reduce real-estate, i.e., study trade-offs between silicon and performance (CISC vs. RISC). 8. Use empty op-code slots to implement Z80 instructions. The first byte is a prefix, and the second byte then selects a Z80 instruction. 9. Use empty op-code slots to implement and control DFT and BIST. For example, an unused op-code slot could be used to initiate some internal self-test and clock out the results, over a period of one or more M-cycles. 10. The state machines M-states and t-states are minimal implementations. In fact, M-states is a simple ripple-counter. Redesign them to be one-hot encoding. Then, make them scannable. 11. Develop methods to generate/create higher levels of abstractions from the behavioral model. 12. One of Prof. Jacob Abraham's students (Satish Thatte) once developed a strategy for testing microprocessors from a register level view of the circuit. The resulting test was checked against a gate level model of the circuit and got quite good fault coverage. Repeat this experiment, using the GL85 model. 13. The GL85 model has two state machines, M-states and t-states, and a 16-bit counter, effectively another state machine, that all interact. Develop a software program that traverses all arcs of the two state machines and exercises the counter.