ð¡ sreg4 att2c00 att2c04 M84 3 /çÐ RAM ÿÿÿÿ PFU ÿÿÿÿ WENA:A4 QLUT2:#RAM:F2=0 WENB:B4 QLUT1:#RAM:F1=0 QLUT0:#RAM:F0=0 QLUT3:#RAM:F3=0 CLKMUX:CLK CEMUX:1 SRDMUX1:RESET SRDMUX2:RESET SRDMUX3:RESET FFMUX0:F FFMUX1:F FFMUX2:F FFMUX3:F FFLATCH3:#FF FFLATCH2:#FF FFLATCH1:#FF FFLATCH0:#FF SRDMUX0:RESET SRMODE:SYNC MODE:F4 LSRMUX:0 CNT ÿÿÿÿ PFU ÿÿÿÿ QLUT2:#LUT:F2=(A2*~(A1*A0))+(~A2*A1*A0) QLUT1:#LUT:F1=(B2*~B1)+(~B2*B1) QLUT0:#LUT:F0=~B1 QLUT3:#LUT:F3=0 CLKMUX:CLKNOT CEMUX:1 SRDMUX1:RESET SRDMUX2:RESET FFMUX0:F FFMUX1:F FFMUX2:F FFLATCH2:#FF FFLATCH1:#FF FFLATCH0:#FF SRDMUX0:RESET SRMODE:SYNC MODE:F4 FMUX3:F LSRMUX:0 $SIGNAL_0 ÿÿÿÿ ÿÿQ0 ÿÿB1 ÿÿA0 ÿÿB0 ÿÿA0 $SIGNAL_1 ÿÿÿÿ ÿÿQ1 ÿÿB2 ÿÿA1 ÿÿB1 ÿÿA1 $SIGNAL_2 ÿÿÿÿ ÿÿQ2 ÿÿA2 ÿÿB2 ÿÿA2 $SIGNAL_3 ÿÿÿÿ ÿÿCLK ÿÿCLK ÿÿA4 ÿÿB4 $SIGNAL_4 ÿÿÿÿ ÿÿF3 ÿÿA3 ÿÿB3 $SIGNAL_5 ÿÿÿÿ ÿÿQ0 ÿÿWD1 $SIGNAL_6 ÿÿÿÿ ÿÿQ1 ÿÿWD2 $SIGNAL_7 ÿÿÿÿ ÿÿQ2 ÿÿWD3 CLK WD0 Q0 Q1 Q2 Q3 CLK SDIN Q8 ` Q16 ` Q24 ` Q32 ` # # K ÿ÷