-- -----------------------------------------------------------------------------
--  STRING2TXD - string to RS232 signal generator               -- TEST BENCH --
-- -----------------------------------------------------------------------------
--
--  File        : 'string2txd.vhd'
--  Author      :  Lars Larsson 
-- 
--  Date        :  February 15, 1999
--
--  Description :  This is an example test bench for the 'string2txd.vhd'.
--
--  Hint        :  Package simulation (file 'simulation.vhd') is required.
-- 
-- -----------------------------------------------------------------------------
--
-- Copyright (C) 1999 Lars Larsson, Dept. of Computer Science
--                                  University of Hamburg
--                                  Vogt-Koelln-Str. 30
--                                  D - 22041 Hamburg, Germany
--                                  larsson@informatik.uni-hamburg.de
--                                  http://tech-www.informatik.uni-hamburg.de/~larsson
--
-- This program is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at your
-- option) any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
--
-- You should have received a copy of the GNU General Public License along
-- with this program; if not, write to the Free Software Foundation, Inc.,
-- 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
--
-- -----------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;

use work.simulation.all;

entity string2txd_testbench is
end string2txd_testbench;

architecture simulate of string2txd_testbench is

   constant  T_BAUD : time := 104167 ns; -- 1 / 9600 bps = 104.16666666 us

   -- some control characters :
   --
   -- ETX = ^C : 0x03
   -- EOT = ^D : 0x04
   -- BEL = ^G : 0x07
   -- LF  = ^J : 0x0A
   -- FF  = ^L : 0x0C
   -- CR  = ^M : 0x0D
   -- SUB = ^Z : 0x1A
   -- DEL = FF : 0xFF

   signal The_fox  : string (1 to 46) := 
          "The quick brown fox jumps over the lazy dog. " & SUB;

   signal I_think  : string (1 to 25) := 
          "I think therefore I am. " & SUB;

   signal HelloSUB : string (1 to  7) := "Hello!" & SUB; -- SUB = ^Z

   signal t_s    : time := T_BAUD; 
   signal txd_s  : std_ulogic;

   begin

    	 s2txd_i : string2txd port map (t_s,HelloSUB,txd_s);

   end simulate;

-- -----------------------------------------------------------------------------

configuration string2txd_testbench_cfg of string2txd_testbench is
  for simulate
  end for;
end string2txd_testbench_cfg;

-- -----------------------------------------------------------------------------

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