--==========================================================
-- Design units : MULTpack (package)
--
-- File name    : MULTpack.vhd
--
-- Purpose      : Summary of all components for the
--                multiplier benchmark
--
-- Limitations  : None
--
-- Library      : WORK
--
-- Dependencies : IEEE;
--
-- Author       : Hans-Peter Eich, REFT
--
-- Simulator    : Synopsys V3.1a on Sun SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
-- V1.0    hpe    14.01.95       None
--=========================================================

LIBRARY IEEE;
USE IEEE.std_logic_1164.all;

PACKAGE MULTpack IS

------------------------------------------------------------
-- Specification of Multiplication in VHDL
------------------------------------------------------------

COMPONENT MULTbehave
  GENERIC (N : POSITIVE := 4);                 -- default n = 4
  PORT (A: IN  INTEGER RANGE 2**N-1 DOWNTO 0;  -- n bit width data in
        B: IN  INTEGER RANGE 2**N-1 DOWNTO 0;  -- n bit width data in
        P: OUT INTEGER RANGE (2**(2*N))-1 DOWNTO 0);    -- 2n bit data in
END COMPONENT;

------------------------------------------------------------
-- Structural Description of a Multiplier - Array
------------------------------------------------------------

COMPONENT MULTstruc
  GENERIC(N: POSITIVE := 4);                        -- default n = 4
  PORT (A: IN  std_logic_vector(N-1 DOWNTO 0);      -- n bit data in
        B: IN  std_logic_vector(N-1 DOWNTO 0);      -- n bit data in
        P: OUT std_logic_vector((2*N)-1 DOWNTO 0)); -- 2n bit data out
END COMPONENT;

------------------------------------------------------------
-- The following component is needed for structural 
-- description 
------------------------------------------------------------

COMPONENT MULTcell
  PORT (A: IN  std_logic;  -- data in
        B: IN  std_logic;  -- data in
        C: IN  std_logic;  -- data in
      Cin: IN  std_logic;  -- carry in
      Sum: OUT std_logic;  -- sum out
     Cout: OUT std_logic); -- carry out
END COMPONENT;

END MULTpack;