--==========================================================
-- Design units : MinMaxTestbench (Entity, Architecture,Configuration)
--
-- File name    : MinMax_Testbench.vhd
--
-- Purpose      : Testbench for MinMax-Circuit
--
-- Limitations  : 
--
-- Library      : IEEE
--
-- Dependencies : MinMaxStruc,MinMaxBehave,MinMaxStim
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.1a on SUN SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
--  v1.0   cjt    13.12.95       new
--=========================================================

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.MinMaxPack.all;

ENTITY MinMaxTestbench IS
END MinMaxTestbench;

--============================ARCHITECTURE==================

ARCHITECTURE Structure OF MinMaxTestbench IS

CONSTANT M : Positive := 9;

SIGNAL DataIn,DataOut: std_logic_vector(M-1 DOWNTO 0);
SIGNAL DataInBeh,DataOutBeh : integer;
SIGNAL Enable,Clk,Reset,Clear : std_logic;

BEGIN

MUT  : MinMaxStruc
GENERIC MAP(M)
PORT MAP(DataIn,
         Enable,
         Clk,
         Clear,
         Reset,
         DataOut);

SPEC : MinMaxBehave
GENERIC MAP(M)
PORT MAP(DataInBeh,
         Clear,
         Reset,
         Enable,
         Clk,
         DataOutBeh);

STIM : MinMaxStim
GENERIC MAP(M)
PORT MAP(DataIn,
         DataInBeh,
         Enable,
         Clk,
         Clear,
         Reset);
         
END Structure;

--============================CONFIGURATION=================

CONFIGURATION MinMaxTest_Config OF MinMaxTestbench IS

  FOR Structure

    FOR MUT  : MinMaxStruc
      USE ENTITY work.MinMaxStruc(Structure);
    END FOR;

    FOR SPEC : MinMaxBehave
      USE ENTITY work.MinMaxBehave(Behavior);
    END FOR;

    FOR STIM : MinMaxStim
      USE ENTITY work.MinMaxStim(Behavior);
    END FOR;

  END FOR;

END MinMaxTest_Config;