--==========================================================
-- Design units : BlackJack_DataPath (Entity, Architecture, Configuration)
--
-- File name    : BlackJack_DataPath.vhd
--
-- Purpose      : provides data flow for bj dealer
--
-- Limitations  : -
--
-- Library      : work, IEEE
--
-- Dependencies : ELEMpack, GateLib, BlackJack_Pack, nMUX_four, REG_5_clr
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.2a on SUN SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
--  v1.0   cjt    04.07.1996     new
--=========================================================

LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.ELEMpack.all;
USE work.BlackJack_Pack.all;

ENTITY BlackJack_DataPath IS
PORT (Card         : IN std_logic_vector(3 DOWNTO 0); -- card value input
      Card_Ready   : IN std_logic;                    -- signal for valid card value
      Set_Ace11flag: IN std_logic;
      Clr_Ace11flag: IN std_logic;
      Ld_Score     : IN std_logic;
      Clr_Score    : IN std_logic;
      Set_Stand    : IN std_logic;
      Clr_Stand    : IN std_logic;
      Set_Broke    : IN std_logic;
      Clr_Broke    : IN std_logic;
      Adder_S0     : IN std_logic;                    -- select input 0 for seladd-mux
      Adder_S1     : IN std_logic;                    -- select input 1 for seladd-mux
      Reset        : IN std_logic;                    -- asynchronous reset active low
      Clk          : IN std_logic;                    -- Clock input
      Card_rdy_s   : OUT std_logic;                   -- synchronized card ready signal
      Card_rdy_d   : OUT std_logic;                   -- delayed card ready signal
      Acecard      : OUT std_logic;                   -- output of acefinder
      ScoreGT16    : OUT std_logic;                   -- output of score > 16 comparator
      ScoreGT21    : OUT std_logic;                   -- output of score > 21 comparator
      Stand        : OUT std_logic;                   -- output of STAND - FF
      Broke        : OUT std_logic;                   -- output of BROKE - FF
      Ace11flag    : OUT std_logic;                   -- output of Ace11flag - FF
      Score        : OUT std_logic_vector(4 DOWNTO 0));
END BlackJack_DataPath;

--============================ARCHITECTURE==================

ARCHITECTURE Structure OF BlackJack_DataPath IS

SIGNAL high: std_logic := '1';
SIGNAL low: std_logic_vector(4 DOWNTO 0) := "00000";
SIGNAL ACEVALUE: std_logic_vector(3 DOWNTO 0) := "0001";
SIGNAL Sixteen: std_logic_vector(4 DOWNTO 0) := "10000";
SIGNAL Twentyone: std_logic_vector(4 DOWNTO 0) := "10101";
SIGNAL brCard,internal_value,internal_Score,internal_Sum: std_logic_vector(4 DOWNTO 0);
SIGNAL Ten_plus: std_logic_vector(4 DOWNTO 0) := "01010";
SIGNAL Ten_minus: std_logic_vector(4 DOWNTO 0) := "10110";
SIGNAL Crs,Stnd,Brke,AcFlag,Reg_Reset,nClk: std_logic;

BEGIN

-- Debounce Card Ready button

Sync_FF: DFFsr
  PORT MAP(Card_Ready,
           high,
           Reset,
           Clk,
           Crs);

Del_FF: DFFsr
  PORT MAP(Crs,
           high,
           Reset,
           Clk,
           Card_rdy_d);

-- Instantiate various FlipFlops for status information

Stand_FF: JK_FF_R
  PORT MAP(Set_Stand,
           Clr_Stand,
           Clk,
           Reset,
           Stnd,
           open);

Broke_FF: JK_FF_R
  PORT MAP(Set_Broke,
           Clr_Broke,
           Clk,
           Reset,
           Brke,
           open);

Ace11flag_FF: JK_FF_R
  PORT MAP(Set_Ace11flag,
           Clr_Ace11flag,
           Clk,
           Reset,
           AcFlag,
           open);

-- Data Path for BlackJack

Acefinder: nCMPN
  GENERIC MAP(4)
  PORT MAP(Card,
           ACEVALUE,
           Acecard,         -- A eq B
           open);

Expander: expand
  GENERIC MAP(4,5)
  PORT MAP(Card,            -- in 3:0
           brCard);         -- out 4:0

Add_select: nMUX_four
  GENERIC MAP(5)
  PORT MAP(Ten_plus,        -- in 0
           Ten_minus,       -- in 1
           brCard,          -- in 2
           low,             -- in 3
           Adder_S0,        -- Select 0
           Adder_S1,        -- Select 1
           internal_value); -- output

Adder: CRA
  GENERIC MAP(5)
  PORT MAP(internal_value,  -- in value a
           internal_Score,  -- in value b
           low(0),          -- carry in
           internal_Sum,    -- sum out
           open);           -- carry out

InvertClock: INV
  PORT MAP(Clk,
           nClk);

Score_Reg: REG_5_clr
  PORT MAP(internal_Sum,    -- data in
           Clr_Score,       -- input to clear register
           Ld_Score,        -- inout to load data to register
           Reset,           -- asynchronous reset active low
           nClk,            -- Clock input
           internal_Score); -- data out

CompareGT16: nCMPN
  GENERIC MAP(5)
  PORT MAP(Sixteen,         -- a in
           internal_Score,  -- b in
           open,            -- a = b
           ScoreGT16);      -- a < b

CompareGT21: nCMPN
  GENERIC MAP(5)
  PORT MAP(Twentyone,       -- a in
           internal_Score,  -- b in
           open,            -- a = b
           ScoreGT21);      -- a < b

Score <= internal_Score;
Card_rdy_s <= crs;
Stand <= Stnd;
Broke <= Brke;
Ace11flag <= AcFlag;

END Structure;

--============================CONFIGURATION=================

CONFIGURATION BlackJack_DataPath_Config OF BlackJack_DataPath IS
FOR Structure

  FOR ALL : DFFsr
    USE ENTITY work.DFFsr(Behavior);
  END FOR;

  FOR ALL : JK_FF_R
    USE ENTITY work.JK_FF_R(Behavior);
  END FOR;

  FOR ALL : nCMPN
    USE ENTITY work.nCMPN(Structure);
  END FOR;

  FOR Expander: expand
    USE ENTITY work.expand(Structure);
  END FOR;

  FOR Add_select: nMUX_four
    USE ENTITY work.nMUX_four(Behavior);
  END FOR;

  FOR Adder: CRA
    USE ENTITY work.CRA(Structure);
  END FOR;

  FOR InvertClock: INV
    USE ENTITY work.inv(Behavior);
  END FOR;

  FOR Score_Reg: REG_5_clr
    USE ENTITY work.REG_5_clr(Behavior);
  END FOR;

END FOR;
END BlackJack_DataPath_Config;