--==========================================================
-- Design units : StopWatchStruc (Entity,Architecture,Configuration)
--
-- File name    : StopWatchStruc.vhd
--
-- Purpose      : Stopwatch with reducing and counting device
--
-- Limitations  : none
--
-- Library      : IEEE
--
-- Dependencies : ELEMpack
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.1a on SUN SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
--  v1.0   cjt    18.01.96       new
--=========================================================

LIBRARY IEEE;
USE IEEE.std_logic_1164.all;
USE work.ELEMpack.all;
USE work.Stoppack.all;

ENTITY StopWatchStruc IS
PORT(StartStop  : IN  std_logic;
     Reset      : IN  std_logic;
     Clk        : IN  std_logic;
     Tenths_out : OUT std_logic_vector(3 Downto 0);
     Seconds_out: OUT std_logic_vector(3 Downto 0);
     Tens_out   : OUT std_logic_vector(2 Downto 0));
END StopWatchStruc;

--============================ARCHITECTURE==================

ARCHITECTURE Structure OF StopWatchStruc IS

SIGNAL int: std_logic;

BEGIN

Unit0: StopWatchReduce
PORT MAP(Clk,StartStop,Reset,int);

Unit1: StopWatchCount
PORT MAP(StartStop,
         Reset,
         int,         
         Tenths_out,
         Seconds_out,
         Tens_out);

END Structure;

--============================CONFIGURATION=================

CONFIGURATION StopWatchStruc_Config OF StopWatchStruc IS
  FOR Structure
    FOR Unit0: StopWatchReduce
      USE ENTITY work.StopWatchReduce(Structure);
    END FOR;
    FOR Unit1: StopWatchCount
      USE ENTITY work.StopWatchCount(Structure);
    END FOR;
  END FOR;
END StopWatchStruc_Config;