--==========================================================
-- Design units : Single Pulser Structure (entity, architecture
--                and configuration)
--
-- File name    : SinglePulserStructure.vhd
--
-- Purpose      : Structural description of a single pulser
--
-- Limitations  : none
--
-- Library      : work
--
-- Dependencies : ELEMpack
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.1a on SUN SPARCstation 10
--
-------------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
-- V1.0    cjt    16.11.95       new
--===========================================================
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE work.ELEMpack.all;
USE work.SINGLEpack.all;

ENTITY SinglePulserStruc IS

  PORT(Pulse_In : IN std_logic;
       Clk      : IN std_logic;
       Pulse_Out: OUT std_logic);

END SinglePulserStruc;

--============================ARCHITECTURE==================

ARCHITECTURE Structure OF SinglePulserStruc IS

  SIGNAL Pulse_sync,find,not_find: std_logic;

  BEGIN

    synchronizer : DFF
    PORT MAP(Pulse_In,
             Clk,
             Pulse_sync);

    finder : DFF
    PORT MAP(Pulse_sync,
             Clk,
             not_find);

    inverter : INV
    PORT MAP(not_find,
             find);

    logic : AND2
    PORT MAP(find,
             Pulse_sync,
             Pulse_Out);

END Structure;

--============================CONFIGURATIONARCHITECTURE==================

CONFIGURATION SinglePulserStruc_Config OF SinglePulserStruc IS

  FOR Structure

    FOR  synchronizer : DFF
      USE ENTITY work.DFF(Behavior);
    END FOR;

    FOR  finder : DFF
      USE ENTITY work.DFF(Behavior);
    END FOR;

    FOR inverter : INV
      USE ENTITY work.INV(Behavior);
    END FOR;

    FOR  logic : AND2
      USE ENTITY work.AND2(Behavior);
    END FOR;

  END FOR;

END SinglePulserStruc_Config;