--==========================================================
-- Design units : Single Pulser Stimuli Generator 
--                (entity, architecture)
--
-- File name    : SinglePulserStim.vhd
--
-- Purpose      : Stimuli generator for Single Pulser Testbench
--
-- Limitations  : none
--
-- Library      : work
--
-- Dependencies : none
--
-- Author       : Claus-Juergen Thomas, REFT
--
-- Simulator    : Synopsys V3.1a on SUN SPARCstation 10
--
-------------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
-- V1.0    cjt    16.11.95       new
--===========================================================
LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY SinglePulserStim IS
  PORT(Pulse : out std_logic;
       Clk   : out std_logic);
END SinglePulserStim;

--============================ARCHITECTURE==================

ARCHITECTURE Behavior OF SinglePulserStim IS

BEGIN

Clk <=    '0' AFTER   0 Ns, '1' AFTER  50 Ns,
          '0' AFTER 100 Ns, '1' AFTER 150 Ns,
          '0' AFTER 200 Ns, '1' AFTER 250 Ns,
          '0' AFTER 300 Ns, '1' AFTER 350 Ns,
          '0' AFTER 400 Ns, '1' AFTER 450 Ns,
          '0' AFTER 500 Ns, '1' AFTER 550 Ns,
          '0' AFTER 600 Ns, '1' AFTER 650 Ns,
          '0' AFTER 700 Ns, '1' AFTER 750 Ns,
          '0' AFTER 800 Ns, '1' AFTER 850 Ns,
          '0' AFTER 900 Ns, '1' AFTER 950 Ns;

Pulse <=  '0' AFTER   0 Ns, 
          '1' AFTER 220 Ns, '0' AFTER 450 Ns,
          '1' AFTER 520 Ns, '0' AFTER 580 Ns;


END Behavior;