--==========================================================
-- Design units : MULTstruc (Structure)
--                Entity, architecture and configuration
--
-- File name    : MULTstruc.vhd
--
-- Purpose      : Structure definition of an N x N bit
--                multiplier array
--
-- Limitations  : None
--
-- Library      : WORK
--
-- Dependencies : IEEE, MULTcell.vhd, ELEMpack.vhd
--
-- Author       : Hans-Peter Eich, REFT
--
-- Simulator    : Synopsys V3.1a on Sun SPARCstation 10
--
-----------------------------------------------------------
-- Revision list
-- Version Author Date           Changes
--
-- V 1.0   hpe    14.01.95       ESA standard
-- V 1.0   hpe    16.01.95       unused inputs on '0'
-- V 1.1   cjt    06.07.95       Change of OR2 to OR_2
--=========================================================

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;

USE work.ELEMpack.ALL;
USE work.MULTpack.ALL;

ENTITY MULTstruc IS
  GENERIC(N: Positive := 4);                         -- default n = 4
  PORT(A: IN  std_logic_vector(N-1 DOWNTO 0 );       -- data in
       B: IN  std_logic_vector(N-1 DOWNTO 0 );       -- data in 
       P: OUT std_logic_vector((2*N)-1 DOWNTO 0));   -- result out
END MULTstruc;

--============================ARCHITECTURE==================

ARCHITECTURE Structure OF MULTstruc IS

  SIGNAL Shift : std_logic_vector (N-1 DOWNTO 0);
  SIGNAL SumIn,CarryIn,CarryOut,SumOut : std_logic_vector (N*N-1 DOWNTO 0);

BEGIN

   row : FOR i IN N-1 DOWNTO 0 GENERATE
column : FOR j IN N-1 DOWNTO 0 GENERATE
    
    init : MULTcell
           PORT MAP(A => A(i),
                    B => B(j),
                    C => SumIn(N*j+i),
                  Cin => CarryIn(N*j+i),
                  Sum => SumOut(N*j+i),
                 Cout => CarryOut(N*j+i));

     Nequal1 : IF N=1 GENERATE -- there is only one MULTcell 
                               -- and nothing else

             SumIn(0) <= '0';
           CarryIn(0) <= '0';
                 P(0) <= SumOut(0);
                 P(1) <= CarryOut(0);
           
               END GENERATE;  -- Nequal1

     Nnot1 : IF N>1 GENERATE  -- there are N*N MULTcells


       RowIequals0 : IF i=0 GENERATE      -- first row
                 CarryIn(j) <= '0';       -- init net
                   SumIn(j) <= '0';       -- init net
                       P(0) <= SumOut(0); -- LSB for P computed
                     END GENERATE; -- RowIequals0

       RowInot0 : IF i>0 GENERATE                        -- last n-1 rows
                 CarryIn(N*i+j) <= CarryOut(N*(i-1)+j);  -- paste carry
                           P(i) <= SumOut(N*i);          -- P(1) to P(N-1)
               SumIn((N*i)+N-1) <= '0';                  -- last column init

         ColumnJnotN1 : IF j<N-1 GENERATE                      -- first columns
                          SumIn(N*i+j) <= SumOut(N*(i-1)+j+1); -- paste sum
                        END GENERATE; -- ColumnJnotN1 
  
                  END GENERATE; -- RowInot0
 
       ColumnJequalsN1 : IF j=N-1 GENERATE -- last column
                   SumIn(N*i+N-1) <= '0';    -- init last column
                         END GENERATE; -- ColumnJequalsN1

             END GENERATE;  -- Nnot1


         END GENERATE;  -- column
         END GENERATE;  -- row


      Adder : IF N>1 GENERATE -- carry ripple adder plus or gate

                 OrGate : OR_2
                 PORT MAP(A => CarryOut((N*N)-1),
                          Y => P(2*N-1),        -- MSB of P
                          B => Shift(N-1));
--                          Y => P(2*N-1));       -- MSB of P

                 FA_line : FOR k IN N-2 DOWNTO 0 GENERATE
  
                     FaGate : FA
                     PORT MAP(A => SumOut(N*(N-1)+k+1),
                              B => CarryOut(N*(N-1)+k),
                            Cin => Shift(k),
                            Sum => P(N+k),
                           Cout => Shift(k+1));
                 END GENERATE;  -- FA_line

                   Shift(0) <= '0';

             END GENERATE; -- Adder

END Structure;

--============================CONFIGURATION=================

CONFIGURATION MULTstruc_Config OF MULTstruc IS
  FOR Structure
    FOR Row
      FOR Column
        FOR init : MULTcell
          USE ENTITY work.MULTcell(Structure);
        END FOR;
      END FOR;
    END FOR;
    FOR Adder
      FOR OrGate : OR_2
        USE ENTITY work.OR_2(Behavior);
      END FOR;
      FOR FA_line
        FOR FaGate : FA
          USE ENTITY work.FA(Structure);
        END FOR;
      END FOR;
    END FOR;
  END FOR;
END MULTstruc_Config;